# d\-Matrix

> d\-Matrix is redefining AI inference with memory\-centric compute built for ultra\-low latency, greater efficiency, and scalable AI infrastructure\.

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## Pages
- [Technology](https://www.d-matrix.ai/technology/)
- [JetStream](https://www.d-matrix.ai/jetstream-accelerator/)
- [Homepage](https://www.d-matrix.ai/)
- [About](https://www.d-matrix.ai/about/)
- [Security](https://www.d-matrix.ai/solutions/security/)

## Posts
- [Frontier class ultra\-low\-latency rack\-scale inference with Raptor XPUs and NVLINK Fusion](https://www.d-matrix.ai/frontier-class-ultra-low-latency-rack-scale-inference-with-raptor-xpus-and-nvlink-fusion/)
- [Introducing d\-Matrix Demo Cloud: Ultra Low Latency Inference, Ready to Test in Minutes](https://www.d-matrix.ai/introducing-d-matrix-demo-cloud-ultra-low-latency-inference-ready-to-test-in-minutes/)
- [Finding the middle ground: how smaller models will unlock the next wave of AI ](https://www.d-matrix.ai/finding-the-middle-ground-how-smaller-models-will-unlock-the-next-wave-of-ai-2/)
- [Model sizes are exploding—and new memory architectures are the way forward ](https://www.d-matrix.ai/model-sizes-are-exploding-and-new-memory-architectures-are-the-way-forward/)
- [How disaggregated AI inference pipelines generate less heat — and smaller bills ](https://www.d-matrix.ai/how-disaggregated-ai-inference-pipelines-generate-less-heat-and-smaller-bills/)

## Events
- [PyTorch Conference 2026](https://www.d-matrix.ai/event/pytorch-conference-2026/)
- [Hot Chips 2026](https://www.d-matrix.ai/event/hot-chips-2026/)
- [RISC\-V Now\!](https://www.d-matrix.ai/event/risc-v-now-2/)
- [Semicon Taiwan](https://www.d-matrix.ai/event/semicon-taiwan/)
- [ModCon'26](https://www.d-matrix.ai/event/modcon26/)

## Newsletters
- [August Newsletter](https://www.d-matrix.ai/newsletter/d-matrix-august-newsletter/)
- [d\-Matrix March Newsletter](https://www.d-matrix.ai/newsletter/march-newsletter/)
- [d\-Matrix April Newsletter](https://www.d-matrix.ai/newsletter/april-newsletter/)
- [d\-Matrix July Newsletter](https://www.d-matrix.ai/newsletter/july-newsletter/)
- [d\-Matrix November Newsletter](https://www.d-matrix.ai/newsletter/november17th-newsletter/)

## Announcements
- [Gimlet Labs, d\-Matrix Partner to Boost Agentic AI Inference Performance](https://www.d-matrix.ai/announcements/gimlet-labs-d-matrix-partner-to-boost-agentic-ai-inference-performance/)
- [Hot Chips 2026: d\-Matrix stacks AI accelerator directly on custom DRAM for 100 TB/s per card — TSMC 4nm compute die bonded face\-to\-face at a 36\-micron pitch on top of a custom\-designed die](https://www.d-matrix.ai/announcements/hot-chips-2026-d-matrix-stacks-ai-accelerator-directly-on-custom-dram-for-100-tb-s-per-card-tsmc-4nm-compute-die-bonded-face-to-face-at-a-36-micron-pitch-on-top-of-a-custom-designed-die/)
- [Chip startup d\-Matrix to use Nvidia chip\-linking tech in AI servers](https://www.d-matrix.ai/announcements/chip-startup-d-matrix-to-use-nvidia-chip-linking-tech-in-ai-servers/)
- [d\-Matrix Joins Nvidia’s AI Inference Push](https://www.d-matrix.ai/announcements/d-matrix-joins-nvidias-ai-inference-push/)
- [Startup d\-Matrix Will Pair Its Raptor Memory\-Based XPU To Nvidia Rackscale Iron](https://www.d-matrix.ai/announcements/startup-d-matrix-will-pair-its-raptor-memory-based-xpu-to-nvidia-rackscale-iron/)

## Announcement Categories
- [In the News](https://www.d-matrix.ai/announcement-category/in-the-news/)
- [Press Releases](https://www.d-matrix.ai/announcement-category/press-release/)

## Collections
- [Local](https://www.d-matrix.ai/gblocks_pattern_collections/local-patterns/)

## Optional
- [Sitemap index](https://www.d-matrix.ai/sitemap_index.xml)