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A unique approach to AI inference acceleration

Since it’s founding in 2019, d-Matrix has built multiple world-first innovations in silicon, software, chiplet packaging and interconnects, and created a one-of-a-kind inference compute platform.

Circuits

World’s first Digital In-Memory Computing (DIMC) solution that tightly integrates compute and memory to eliminate bottlenecks associated with traditional architectures

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Numerics

Among the first to natively implement Block Floating Point numerics, offering the energy efficiency of integer arithmetic with the high dynamic range of floating-point.

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Chiplets & Packaging

Chiplet based architecture scales memory-compute complex using innovative die-to-die interconnects in an all-to-all topology and with advanced 2D/3D packaging

3d Chiplet

Scale-up and Scale-out

High bandwidth and fully connected topology up to 16 chiplets across 2 cards. Standard PCIe based scale-up within a node. Scale-out across nodes using PCIe or Ethernet.

Scalable AI

Hardware-Software Codesign

Built with open software such as PyTorch, MLIR, Triton DSL. Programming models for spatial architectures and multi-level memory hierarchies, efficient networking communication between devices and minimal host synchronization

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01

Circuits & Numerics

  • Digital In-Memory Compute (DIMC)
  • Block Float Sparsity
  • Compression
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02

Chiplets & Advanced Packaging

  • 2D, 3D Stacking
  • Logic, Memory Co-Package
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03

ML Tools & Software

  • Open Source First
  • Frictionless & Scalable
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Breaking the AI Barrier

Leading the shift to digital in-memory compute

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Breaking barriers with world firsts

Nighthawk Family

The world’s first digital in-memory compute

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Jayhawk Family

The world’s first BoW chiplet die-to-die interconnect with digital in-memory compute

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